发明名称 |
Chip-on-Wafer structures and methods for forming the same |
摘要 |
A package component includes a substrate, wherein the substrate has a front surface and a back surface over the front surface. A through-via penetrates through the substrate. A conductive feature is disposed over the back surface of the substrate and electrically coupled to the through-via. A first dielectric pattern forms a ring covering edge portions of the conductive feature. An Under-Bump-Metallurgy (UBM) is disposed over and in contact with a center portion of the conductive feature. A polymer contacts a sidewall of the substrate. A second dielectric pattern is disposed over and aligned to the polymer. The first and the second dielectric patterns are formed of a same dielectric material, and are disposed at substantially a same level. |
申请公布号 |
US8643148(B2) |
申请公布日期 |
2014.02.04 |
申请号 |
US201213397204 |
申请日期 |
2012.02.15 |
申请人 |
LIN JING-CHENG;CHANG HSIN;LIN SHIH TING;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
LIN JING-CHENG;CHANG HSIN;LIN SHIH TING |
分类号 |
H01L21/78 |
主分类号 |
H01L21/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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