发明名称 METHOD AND APPARATUS FOR PERFORMING DATA OPERATIONS WITHIN A MEMORY DEVICE
摘要 Described is an apparatus which comprises: a source array of memory cells with associated source sense amplifiers; a destination array of memory cells with associated destination sense amplifiers; and logic to activate a source word-line (WL) to select a row of memory cells within the source array such that data in the selected row of memory cells is latched by the associated source sense amplifiers, wherein the logic to activate a destination WL to select a row of memory cells within the destination array such that data in the selected row of memory cells is latched by the associated destination sense amplifiers, and wherein the source and destination arrays of memory cells are within a same bank of a memory.
申请公布号 WO2016153615(A1) 申请公布日期 2016.09.29
申请号 WO2016US17226 申请日期 2016.02.10
申请人 INTEL CORPORATION 发明人 TOMISHIMA, Shigeki;LU, Shih-Lien
分类号 G11C7/06;G11C8/08;G11C8/12 主分类号 G11C7/06
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