| 摘要 |
PROBLEM TO BE SOLVED: To simplify wiring up to a memory, to prevent performance from degrading by an increase of an area and long distance wiring, and to increase a memory access speed. SOLUTION: An input and output port of a processing module PM, respective memory interfaces IF and respective memory banks are connected by connection wires wired in matrix (lattice) shape along a Y-direction (the first direction) and an X-direction (the second direction) in an arrangement area (upper layer thereof) for a plurality of memory macros. The connection wire includes multilayer wired instruction information wires (command address wire) and data wires, the instruction information wire is formed of a private wire (dedicated wire), and at least a second-directional wire is formed of a private wire, in the data wire. COPYRIGHT: (C)2008,JPO&INPIT
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