NONVOLATILE MEMORY INTERFACE FOR METADATA SHADOWING

摘要

A memory includes non-volatile memory devices, each of which has multiple nonvolatile memory cells. A write controller streams bits to the memory devices in groups of N bits using a write data channel having write bus drivers, receivers and write bus topology that take advantage of high-speed signaling to optimize a speed of writing to the memory devices. Consecutive groups of bits are written to consecutive memory cells within respective memory devices. A self-referenced read controller reads bits from the memory devices using a read channel having read drivers, receivers, and read bus topology that include no design requirements for high-speed or low-latency data transmission.

主权项

1. A method for memory management, comprising:
streaming N bits to a memory buffer on a memory device using a write data channel having write bus drivers, receivers and write bus topology that optimize a speed of writing to the memory devices; writing the N bits to consecutive non-volatile memory cells in the memory device at a first speed, using a bi-directional bus; and reading bits from the memory device using self-referenced reads over a read channel having read drivers, receivers, and read bus topology to provide reads at a second speed that is slower than the first speed, using the bi-directional bus.