发明名称 INTEGRATED CIRCUIT PACKAGE AND MANUFACTURING METHOD THEREOF
摘要 An IC package includes: a multi-layered PCB having a plurality of insulating layers and a plurality of conductive pattern layers stacked in sequence and a plurality of via-holes formed through the plurality of the insulating layers for an electrical connection between the layers; and an IC chip disposed in a core insulating layer of the plurality of the insulating layers to be embedded in the multi-layered PCB and including a plurality of input/output pads on their surface. The input/output pads disposed at an outermost area of the IC chip are coupled to outer terminals by connection members without passing through said via-hole, the remaining input/output pads except for the input/output pads disposed at the outermost area of the IC chip are coupled to the outer terminals through the via-hole.
申请公布号 US2009057001(A1) 申请公布日期 2009.03.05
申请号 US20080201153 申请日期 2008.08.29
申请人 JUNG JI-HYUN;CHO SHI-YUN;LEE YOUNG-MIN;CHOI YOUN-HO 发明人 JUNG JI-HYUN;CHO SHI-YUN;LEE YOUNG-MIN;CHOI YOUN-HO
分类号 H01R12/04;H05K3/00 主分类号 H01R12/04
代理机构 代理人
主权项
地址