SIMULTANEOUSLY MEASURING DEGRADATION IN MULTIPLE FETS

摘要

A structure and method of testing degradation of semiconductor devices by stressing an array of several semiconductor devices at the same time and measuring the resulting degradation separately for each individual device to obtain an estimate of its expected lifetime is provided. The devices may be subjected to stress that is either in a pulsed state or in a DC state. An on-chip pulse generator may be used for stressing in the pulsed state.

主权项

1. A method comprising:
measuring a first set of values of a current Idd through each field effect transistor (FET) in a plurality of FETs; applying a stress voltage to one of drains and sources of all of the plurality of FETs; applying at least one signal to gates of all of the plurality of FETs; removing the signal to the gates of all of the plurality of FETs; turning on individual gates of individual FETs of the plurality of FETs one by one in succession, and measuring a second set of values of the current Idd through individual FETs at instances when the individual gates of the individual FETs are turned on; and comparing the first set of values to the second set of values.