发明名称 Dual NSD implants for reduced RSD in an NMOS transistor
摘要 In an embodiment of the invention, a method of forming an NMOS (n-type metal-oxide semiconductor) transistor is disclosed. A dual mask pattern is used to ion-implant source/drain regions of the NMOS transistor. The first mask allows first doses of As (arsenic), P (phosphorous) and N (Nitrogen) to be ion-implanted. After these doses are ion-implanted, a high temperature (900-1050 C) spike anneal is performed to activate the formed source/drains. A second mask allows a second dose of phosphorus to be implanted in the source/drain regions. The second dose of the phosphorus is typically higher than the first dose of phosphorus. The second dose of phosphorus lowers the Rsd (resistance of the source and drain regions) and dopes n-type poly-silicon blocks.
申请公布号 US8865557(B1) 申请公布日期 2014.10.21
申请号 US201414457209 申请日期 2014.08.12
申请人 Texas Instruments Incorporated 发明人 Nandakumar Mahalingam
分类号 H01L21/336;H01L49/02;H01L21/265 主分类号 H01L21/336
代理机构 代理人 Pessetto John R.;Telecky, Jr. Frederick J.
主权项 1. A method of forming a portion of an integrated circuit comprising: implanting a first dose of phosphorus, a first dose of arsenic and a first dose of nitrogen into a first poly silicon block and a second poly silicon block; performing a first thermal process that activates the first dose of phosphorous, the first dose of arsenic and the first dose of nitrogen; implanting a second dose of phosphorus into a third poly silicon block and the first poly silicon block.
地址 Dallas TX US