发明名称 PRINTED CIRCUIT BOARDS HAVING BLIND VIAS, METHOD OF TESTING ELECTRIC CURRENT FLOWING THROUGH BLIND VIA THEREOF AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGES INCLUDING THE SAME
摘要 A method of manufacturing a semiconductor package is provided. The method includes providing a strip substrate having a plurality of unit substrate regions that are spaced apart from each other by a periphery region and have blind vias, a peripheral conductive pattern layer disposed in the periphery region, and a connection pattern layer electrically connecting the blind vias to the peripheral conductive pattern layer. Semiconductor chips are disposed on the plurality of unit substrate regions, respectively. Conductive wires are formed to electrically connect connection pads disposed on the plurality of unit substrate regions to bonding pads disposed on the semiconductor chips. The connection pads are electrically connected to the blind vias, and forming the conductive wires includes performing a test for confirming a current that flows between each conductive wire and the peripheral conductive pattern layer through the unit substrate region.
申请公布号 US2016351534(A1) 申请公布日期 2016.12.01
申请号 US201514938322 申请日期 2015.11.11
申请人 SK hynix Inc. 发明人 LEE Ki Yong;KIM Jong Hyun;CHOI Hyung Ju
分类号 H01L23/00;G01R31/28;H05K1/02;H01L21/66;H05K1/11 主分类号 H01L23/00
代理机构 代理人
主权项 1. A method of manufacturing a semiconductor package, the method comprising: providing a strip substrate having a plurality of unit substrate regions that are spaced apart from each other by a periphery region and have blind vias, a peripheral conductive pattern layer disposed in the periphery region, and a connection pattern layer electrically connecting the blind vias to the peripheral conductive pattern layer; mounting semiconductor chips on the plurality of unit substrate regions; and forming conductive wires electrically connecting connection pads disposed on the plurality of unit substrate regions to bonding pads disposed on the semiconductor chips, wherein the connection pads are electrically connected to the blind vias, and wherein forming the conductive wires includes performing a test for confirming a current that flows between each conductive wire and the peripheral conductive pattern layer through the plurality of unit substrate regions.
地址 Icheon-si KR