| 摘要 |
PROBLEM TO BE SOLVED: To execute RAM macro checking area verification by using an LSI function mentioning level circuit and an RAM-BIST control circuit by a logical simulator, while preventing any verification mistake or verification leakage, in a short period of time. SOLUTION: An LSI function mentioning level circuit 103 includes an RAM-BIST control circuit 101 and an RAM macro 105 for checking area verification, and the RAM macro 105 for checking area verification includes the RAM macro 102 and the RAM checking area verifying circuit 104. When the RAM-BIST control circuit 101 is operated by a logical simulator 100 to check the RAM macro 102, an address, input data, chip enable and write enable generated by the RAM-BIST control circuit 101 are monitored by an RAM checking area verifying circuit 104, and the decision of an area to be checked is executed in every test sequence. COPYRIGHT: (C)2005,JPO&NCIPI
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