| 发明名称 |
SEMICONDUCTOR DEVICE |
| 摘要 |
A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, a first region of a first conductivity type provided along the first surface selectively on a second region of a second conductivity type formed along the first surface, and a third region of a first conductivity type between the second region and the second surface. The semiconductor device also includes a gate electrode adjacent to the second region. First, second, and third electrode pads are formed along the second surface. The first pad is electrically connected by a first via through the substrate to first region. The third electrode pad is electrically connected by a second via through the substrate to the gate electrode. |
| 申请公布号 |
US2016268421(A1) |
申请公布日期 |
2016.09.15 |
| 申请号 |
US201514836721 |
申请日期 |
2015.08.26 |
| 申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SHINOHARA Hitoshi |
| 分类号 |
H01L29/78;H01L29/417;H01L29/06;H01L29/10;H01L29/08;H01L23/48;H01L29/739;H01L23/00 |
主分类号 |
H01L29/78 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor device, comprising:
a semiconductor substrate having a first surface and a second surface opposite to the first surface and including:
a first region of a first conductivity type provided along the first surface,a second region of a second conductivity type provided along the first surface, the first region being selectively provided in the second region, anda third region of the first conductivity type between the second semiconductor region and the second surface; a gate electrode adjacent to second region through a gate insulation film; a first electrode pad on the second surface and electrically insulated from the third region; a second electrode pad on the second surface and electrically connected to the third region; a third electrode pad on the second surface and electrically insulated from the third region and electrically connected to the gate electrode; a first via extending through the semiconductor substrate from the second surface to the first surface, a fourth electrode being in the first via and electrically connecting the first region to the first electrode pad; and a second via extending through the semiconductor substrate from the second surface to the first surface, a fifth electrode being in the second via and electrically connecting the gate electrode to the third electrode pad. |
| 地址 |
Tokyo JP |
