发明名称 COMB TERMINALS FOR PLANAR INTEGRATED CIRCUIT INDUCTOR
摘要 A technique for reducing series resistance of an inductor system, which may increase the quality factor of the inductor system, has been disclosed. An apparatus includes a conductive loop formed from a first conductive layer. The conductive loop comprises a first terminal and a second terminal. The first terminal includes at least one first conductive finger in the first conductive layer. The second terminal includes at least one second conductive finger in the first conductive layer. The at least one second conductive finger is interdigitated with the at least one first conductive finger without directly contacting the at least one first conductive finger. The apparatus may include a serpentine gap in the first conductive layer. The apparatus may include at least one first conductive via coupled to a second conductive layer and coupled the at least one first conductive fingers, respectively.
申请公布号 US2016351309(A1) 申请公布日期 2016.12.01
申请号 US201514722607 申请日期 2015.05.27
申请人 Silicon Laboratories Inc. 发明人 Caffee Aaron J.
分类号 H01F5/00;H01F41/04;H01F5/04 主分类号 H01F5/00
代理机构 代理人
主权项 1. An apparatus comprising: a conductive loop formed from a first conductive layer, the conductive loop comprising a first terminal and a second terminal, the first terminal comprising at least one first conductive finger in the first conductive layer, and the second terminal comprising at least one second conductive finger in the first conductive layer, the at least one second conductive finger being interdigitated with the at least one first conductive finger without directly contacting the at least one first conductive finger.
地址 Austin TX US