发明名称 |
System and method for operating a packet buffer in an intermediate node |
摘要 |
A technique implements a novel high-speed high-density packet buffer utilizing a combination of high-speed and low-speed memory devices. The novel packet buffer is organized as a plurality of FIFO queues where each FIFO queue is associated with a particular input or output line. Each queue comprises a high-speed cache portion that resides in high-speed memory and a low-speed high-density portion that resides in low-speed high-density memory. The high-speed cache portion contains FIFO data that contains head and/or tail associated with the novel FIFO queue. The low-speed high-density portion contains FIFO data that is not contained in the high-speed cache portion.
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申请公布号 |
US2005169291(A1) |
申请公布日期 |
2005.08.04 |
申请号 |
US20050090734 |
申请日期 |
2005.03.25 |
申请人 |
KEY KENNETH M.;MAK KWOK K.;SUN XIAOMING |
发明人 |
KEY KENNETH M.;MAK KWOK K.;SUN XIAOMING |
分类号 |
H04L12/56;H04L29/06;H04L29/08;(IPC1-7):H04L12/28 |
主分类号 |
H04L12/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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