Chip package assembly and manufacturing method thereof

摘要

In one embodiment, a chip package assembly can include: a first substrate at a bottom layer, the first substrate having a first surface and a second surface opposite to the first surface, where the second surface is provided with a first group of inner leads; at least one chip layer above the first group of inner leads, where each of the chip layers comprises a third surface and a fourth surface opposite to the third surface, where electrodes on the third surface that that lie at the lowest level are electrically coupled to the first group of inner leads through a first connector; and a second substrate above the fourth surface on the topmost layer and having a fifth surface, and where the fifth surface is provided with a second group of inner leads electrically coupled to the electrodes on the fourth surface on the topmost layer.

主权项

1. A chip package assembly, comprising:
a) a first substrate at a bottom layer, the first substrate having a first surface and a second surface opposite to said first surface, wherein said second surface is provided with a first group of inner leads; b) at least one chip layer above said first group of inner leads, wherein each of said chip layers comprises a third surface and a fourth surface opposite to said third surface, wherein electrodes on said third surface that that lie at the lowest level are electrically coupled to said first group of inner leads through a first connector; c) a second substrate above said fourth surface on the topmost layer and having a fifth surface, wherein said fifth surface is provided with a second group of inner leads electrically coupled to the electrodes on said fourth surface on the topmost layer, and wherein said second substrate comprises a sixth surface opposite to said fifth surface; d) a plastic package in the space between said first and second substrates, wherein side surfaces of said plastic package expose said first and second groups of inner leads; and e) first and second groups of outer leads on the side surfaces of said plastic package, being configured to electrically couple with said first and second groups of inner leads, and extending to said second surface or said sixth surface.