SEMICONDUCTOR PACKAGE WITH HIGH ROUTING DENSITY PATCH

摘要

Methods and systems for a semiconductor package with high routing density routing patch are disclosed and may include a semiconductor die bonded to a substrate and a high routing density patch bonded to the substrate and to the semiconductor die, wherein the high routing density patch comprises a denser trace line density than the substrate. The high routing density patch can be a silicon-less-integrated module (SLIM) patch, comprising a BEOL portion, and can be TSV-less. Metal contacts may be formed on a second surface of the substrate. A second semiconductor die may be bonded to the substrate and to the high routing density patch. The high routing density patch may provide electrical interconnection between the semiconductor die. The substrate may be bonded to a silicon interposer. The high routing density patch may have a thickness of 10 microns or less. The substrate may have a thickness of 10 microns or less.

主权项

1. A method for semiconductor packaging, the method comprising:
receiving a high routing density patch comprising:
semiconductor material;at least one conductive layer on the semiconductor material; andat least one inorganic dielectric layer on the semiconductor material; removing at least substantially all of the semiconductor material from the high routing density patch; bonding the high routing density patch to a first surface of a substrate; and bonding a semiconductor die to the first surface of the substrate and to the high routing density patch, wherein the high routing density patch comprises a denser trace line density than the first substrate.