发明名称 RELOADING PART OF HIGH SPEED FACSIMILE
摘要 PURPOSE:To offer a circuit configuration which can return to a normal operation at K parameter unit without stopping a facsimile system in case when an error occurs, by providing a pair of line memories and a picture data memory on a picture data output part of the delivery of a reload-processing circuit of a high speed facsimile whose processing time of 1 line is constant. CONSTITUTION:A pair of line memories 20, 22 in which a reloading data is written and read out alternately and by being replaced with each other, and a picture data memory 18 in which a read-out data of the line memory concerned is written and which has capacity being capable of storing a data of a plural line portion are provided on a data output part of the delivery of a reload- processing circuit 12, and if a bit error occurs in the course of transmission, the error is detected by the reload-processing circuit 12. When the error is detected, it is informed to an error processing circuit 14, switching of read-out and write of a line memory group 16 is stopped by a signal 30, and the line memory is fixed. Subsequently, a normal data of the other memory is sent repeatedly to the picture data memory 18, so that no blank part is made in recording.
申请公布号 JPS58220565(A) 申请公布日期 1983.12.22
申请号 JP19820103190 申请日期 1982.06.16
申请人 FUJITSU KK 发明人 SASAKI YUKIO;KIMURA MASATOSHI;NAKAJIMA JIYUNZOU
分类号 H04N1/40;(IPC1-7):04N1/40 主分类号 H04N1/40
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