发明名称 DIGITAL TRANSMITTER FOR CONTROL OF TIME DIVISION DIRECTION
摘要 PURPOSE:To obtain an offset eliminating circuit which has high accuracy and can be easily converted into an LSI by detecting the offset quantity of a reception part in a burst-off mode and subtracting said offset quantity from an input signal in a burst-on mode respectively. CONSTITUTION:A transmission/reception changeover switch 3 is connected to a transmitter 1 in a burst-off section at a reception part. Switches 15 and 18 are closed when no input signal is applied to the reception part. Then an equalizer 6 (a circuit to erase the offset voltage 19) forms a closed loop containing an analog integrator 17 on a feedback line. Therefore the offset is eliminated if the DC gain of the integrator 17 is satisfactorily large. At the same time, the output voltage of the integrator 17 is approximately equal to the offset voltage. Then the switch 3 is connected to the receiver side to secure a burst-on mode and therefore switches 15 and 18 are opened. However the output voltage of the integrator 17 is held as always. At the same time, the voltage which cancels the input offset voltage 19 is impressed continuously via an analog adder 16. As a result, the offset can be eliminated even in a burst-on mode.
申请公布号 JPS60167529(A) 申请公布日期 1985.08.30
申请号 JP19840021800 申请日期 1984.02.10
申请人 HITACHI SEISAKUSHO KK;NIPPON DENSHIN DENWA KOSHA 发明人 SUZUKI TOSHIROU;TAKATORI HIROSHI;ISHIKAWA MASAYUKI;KIMURA TADAKATSU
分类号 H03H19/00;H04B3/04;H04J3/00;H04L25/06 主分类号 H03H19/00
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