摘要 |
PURPOSE:To obtain always an output signal with an optimum level by obtaining a difference between the reference value and peak value of an output signal level over the scanning full picture elements at each end of main scanning corresponding to each line to change the main scanning period and the picture element read clock frequency. CONSTITUTION:Every time the main scanning corresponding to the line is finished, the peak value Vm of an output signal level over the entire picture elements at the scanning is compared with a reference voltage VR corresponding to the optimum output signal level by an analog comparator circuit 10. Through the result of comparison, an AND gate 7 or 8 is selected and a shift pulse phis front ridge detection signal is inputted to an up-down counter 6 from a timing circuit 11 via the selected AND gate 7 or 8. In case of Vm>VR, the count D of the counter 6 is incremented and when Vm<VR, the D is decremented. The period of the next main scanning and the picture read clock frequency are controlled by the count D.
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