发明名称 CAPTEUR D'IMAGE AVEC GENERATION DE SEQUENCES DE SIGNAUX DE COMMANDE
摘要 The sequencing circuit which produces these signals comprises: a programmable memory (MEM) containing binary words (M0, M1, M2, etc.) in which each word comprises a group of several bits of position 1 to N, and in which the position i of a bit in a word corresponds to the position i of a respective control signal; a memory controller (CTRL_MEM) for extracting from the memory at a determined rate the words located at successive addresses of the memory from a start address to an end address; and a control signal generation circuit (GEN_TIMING) establishing each control signal of position i from the succession of bits of respective position i that are extracted from the memory by the controller, the control signal reproducing the successive values taken by the bit of position i at the clock rate.
申请公布号 FR3012002(B1) 申请公布日期 2016.12.23
申请号 FR20130060062 申请日期 2013.10.16
申请人 E2V SEMICONDUCTORS 发明人 DIASPARRA BRUNO
分类号 H04N5/341 主分类号 H04N5/341
代理机构 代理人
主权项
地址