发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To reduce the write cycle by not correcting a word read by one address at write, storing words except the object one word in a register, inputting a write word and writing said information to the address together with an ECC bit generated corresponding to the obtained information. CONSTITUTION:A block 50 including a write object work 1 is read and the information of new ECC bit is decided from a new word '1' to be written and a word 2 of no correction. Thus, switches 62, 63 are turned to the position (b) at an address bit An, a word '1' of the input buffer 42 and a word 2 on a bus BS2 are inputted to a register 52 and the words are inputted to an EEC code bit generating circuit 33. The words 1'', 2 and the new ECC bit are written in the block 50 via buses BW1-3 and write amplifiers 21-23. At read, one of the corrected words 1', 2' is outputted via the ECC correction 31 and mis- detection 32. Through the constitution above, the write cycle is reduced and the peripheral circuit is simplified.
申请公布号 JPS62214599(A) 申请公布日期 1987.09.21
申请号 JP19860056429 申请日期 1986.03.14
申请人 FUJITSU LTD 发明人 ARAKAWA HIDEKI
分类号 G11C29/00;G11C29/42 主分类号 G11C29/00
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