发明名称 VIDEO SIGNAL PROCESSOR
摘要 PURPOSE:To consolidate a clamping circuit and a blanking adding circuit to one circuit, and to simplify a circuit constitution, by switching the clamp timing of a clamping circuit corresponding to an inputted video signal. CONSTITUTION:By switching an RGB/NTSC switching pulse 11 to an RGB, an analog switch 10 selects and outputs an RGB input 1, and an analog switch 19 selects and outputs a BF pulse 3. A clamping circuit 20 clamps the RGB input by the BF pulse 3. Adversely, by switching the switching pulse 11 to an NTSC, the analog switch 10 outputs a signal 5 in which an NTSC input is converted to an RGB signal, and the switch 10 outputs an HD pulse 7. The circuit 20 clamps the sig nal in which the NTSC input is converted to the RGB, by the HD pulse 7. Thus, since the output of the circuit 20 is changed to the signal generated by clamping the input 1, or 5, only one clamping circuit 20 is required regardless of plural inputs.
申请公布号 JPS62269491(A) 申请公布日期 1987.11.21
申请号 JP19860112062 申请日期 1986.05.16
申请人 CANON INC 发明人 YAMAGISHI YOICHI;TAKAYAMA MAKOTO
分类号 H04N5/18;H04N5/46;H04N9/00 主分类号 H04N5/18
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