| 摘要 |
PURPOSE:To simplify a complex process when an aperture for forming an emitter is drilled by a method wherein the selective etching properties of N-type and P-type polycrystalline silicon to reduce the number of masks. CONSTITUTION:After a resist pattern is left on an SiO2 layer 23, a laminated layer composed of an SiO2 layer 13, an Si3N4 layer 14, 1st polycrystalline silicon layer 15 and the SiO2 layer is patterned by RIE. After the SiO2 layer 23 is removed by an NH4F solution, 2nd polycrystalline silicon layer 16 is formed. Then, As, an N-type impurity, is diffused into the 2nd polycrystalline silicon layer 16 contacted with the 1st polycrystalline silicon layer 15 to convert a part of the 2nd polycrystalline silicon layer 16 into an N-type region 26. In this heat treatment process, boron which is added to the 2nd polycrystalline silicon layer 16 is diffused into silicon to form a diffused layer 18 for leading out the base electrode of a transistor. Then, after an SiO2 layer 33 is removed, the N-type region 26 in the 2nd polycrystalline silicon layer 16 and the 1st polycrystalline silicon layer 15 are dissolved and removed by KOH solution. Then an SiO2 layer 43 is formed on the 2nd polycrystalline silicon layer 16. The SiO2 layer 43 is formed so as to have a thickness of not less than 2000 Angstrom which is four times of the thickness of the SiO2 layer 13 in order to be sufficiently left when the SiO2 layer 13 on the region where an emitter region is to be formed is removed in a process afterwards.
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