| 摘要 |
PURPOSE:To add interval variation to a sound signal of a instrument sound, etc., without cutting off the high frequency range. CONSTITUTION:This device is provided with an interval control circuit 201 which determines the number of delay stages for internal control data. A write address and a read address having an address difference corresponding to the output int(M) of the integer part of the internal control circuit 201 is generated by an address generating circuit 202. According to the addresses, input data are delayed by a data storage circuit 101 and the delayed data are supplied to an all-pass filter 204. Then when the int(M) varies, the transfer data are supplied as delay data which are 0 or 1 clock precedent to the all-pass filter 204 and the interval variation can be added without a noise or variation in frequency characteristic. |
