发明名称 METHOD AND APPARATUS FOR ESTIMATING THE POWER DISSIPATED BY A DIGITAL CIRCUIT
摘要 <p>This is a method of quickly computing the power dissipated by a digital circuit using information available at the gate library level. It estimates the short-circuit power by modeling the energy dissipated by the cell per input transition as a function of the transition time or edge rate, and multiplying that value by the number of transitions per second for that input.</p>
申请公布号 WO1995034036(A2) 申请公布日期 1995.12.14
申请号 US1995007040 申请日期 1995.06.02
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