| 摘要 |
PURPOSE: To provide the digital signal processing circuit which eliminates a limit cycle due to the use of an IIR filter and prevents an unnecessary effect sound from being generated at the time of reverberation sound addition processing. CONSTITUTION: The circuit is equipped with the IIR filter consisting of at least one adder 6, multipliers 3, 4, 5, 7, and 8, and delay units 1, 2, 9, and 10 and a zero detecting circuit 11 which is arranged in front of the IIR filter to detect the zero level of an input signal and outputs a detection signal for controlling the output of the IIR filter. |
