| 摘要 |
<p>A Hall transducer produces a signal Vsig. Threshold voltages VPth and VNth are generated at the beginning, tupdate, of each of a succession of update time intervals, of 64 pulses in Vsig, to be fixed percentages respectively of the peak to peak voltage in Vsig. A proximity-detector binary output voltage is high when Vsig exceeds threshold voltage VPth and low when Vsig is below threshold voltage VNth. Signals VPold and VNold, generated by first and second DACs, are equal to the first positive and negative peaks in Vsig after each time tupdate initiating the start of a successive interval. Signals VPnew and VNnew, simultaneously generated by third and fourth DACs, are equal to the greatest positive and negative peak voltages in Vsig during the interval ending at tupdate. Counters present their count to the first and second DACs that count pulses from a clock for tracking and holding +/- peaks in Vsig. After each time tupdate, a pulse in a signal Vupdt is generated if at time tupdate VNnew lies outside the range. VNold-+Z v to VNold++Z v of if VNnew lies outside the range VNold-+Z v to VNold++Z v, where +Z v is an incremental DC bias voltage. Vupdt resets the counters so that during the succeeding update time interval the threshold voltages VPth and VNth have the fixed percentages of the updated threshold voltages VPnew-VNnew.</p> |
