PLANARE TRANSISTORSTRUKTUR

摘要

There is disclosed a planar transistor structure comprised of a semiconductor chip with n<-> conductivity forming a collector area and presenting a base area (11) and a transmitter area (12) with n<+> conductivity diffused in its upper surface and a passivation layer (13). The passivation layer (13) covers the portions of the upper surface of the chip (10) which do not act as a contact window. In the collector material with n<-> conductivity an annular area with n<+> conductivity is diffused which completely surrounds the base area (11). The passivation layer extends on this annular area (16). Either the transmitter metalization (14), or the base metallization (15) is prolonged above the passivation layer up to the region of the annular area (16).