发明名称 System for scan testing of logic circuit networks
摘要 The integrity of a circuit processing logic signals is verified by use of switching means, including pass transistors, which are selectively varied to provide different test circuit configurations for different modes of operation. The circuit operates in normal, scan, test and data receive modes. During normal operation, the logic signal from the primary circuit is passed directly through a logic test block without the shifting of data in the logic test block.
申请公布号 US5155432(A) 申请公布日期 1992.10.13
申请号 US19910730420 申请日期 1991.07.16
申请人 XILINX, INC. 发明人 MAHONEY, JOHN E.
分类号 G01R31/3185 主分类号 G01R31/3185
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