| 摘要 |
PURPOSE:To prevent the conventional delay of a point NULL caused by the influence of reflection, fading, etc., by setting patterns '01' and '10' to be the points NULL at the time of detecting plural bits of them. CONSTITUTION:The detection of a pattern '00' is not set to be the point NULL but the point of the time of detecting both patterns of '01' and '00' by the number of bits respectively specified by comparators 15 and 16 is set to be the point NULL so that the point NULL is prevented from erroneous detection. Namely, even if the patterns of '01' or '10' become '00' by the influence of reflection and fading, it is not erroneously detected as the point of NULL by paying attention to that the input value of a pattern holding flipflop 14 changes from '01' to '10' before/after the position just under a beacon. The respective parameters of shift registers 19 and 20, adders 21 and 22 and the comparators 23 and 14 are adjusted and the output of the comparator becomes significant at the time of detecting significant by not less than 20 bits of shift register outputs among 25 bits of them, for example so that the detection of the point NULL can be prevented from delay. |
