| 摘要 |
Interlevel gaps between closely spaced circuit elements, such as closely spaced metal interconnect lines, are filed using a biased electron cyclotron resonance (ECR) deposition process. The gaps between circuit elements may be separated by distances of less than 0.6 microns and the gaps can have aspect rations in excess of 2.0. To fill such gaps between the circuit elements on a semiconductor wafer, the wafer is mounted in an ECR reaction chamber. A continuing flow of oxygen (O2) and silane (SiH4) gas is introduced into the ECR system's plasma and reaction chambers, respectively, while applying a microwave excitation so as to generate a plasma. High deposition rates and low film stress are achieved by controlling the flow of oxygen and silane so as to maintain an oxygen to silane gas flow ratio of less than 1.5. In addition, the wafer is cooled, typically using helium, so as to maintain wafer temperature below 300 degrees Celsius, because maintaining low temperatures during ECR deposition has been found to both increase the oxide deposition rate and to reduce the deposited film's compressive stress. This method makes it possible to achieve oxide deposition rates of 6000 Angstroms and above, with film stress below 1.5*109 dynes/cm2. Furthermore, these deposition rates and film stresses are obtained with a high degree of uniformity from wafer to wafer.
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