发明名称 Servicing transparent system interrupts and reducing interrupt latency
摘要 A system management interrupt (SMI) handler comprising a plurality of service tasks is provided a computer system to service SMIs. The service tasks are executed interleavingly with normal execution. A SMI task queue is provided to queue incidences of the service tasks for servicing SMIs. A SMI trigger mechanism comprising a timer is reserved for triggering execution of the service tasks. A register is predesignated to store a SMI status word for differentiating a SMI is triggered by the reserved SMI trigger mechanism from other SMIs triggered by other general purpose SMI trigger mechanism. As a result, the interrupt latency for servicing a SMI is reduced.
申请公布号 US5437039(A) 申请公布日期 1995.07.25
申请号 US19930047172 申请日期 1993.04.13
申请人 INTEL CORPORATION 发明人 YUEN, DESMOND
分类号 G06F9/48;(IPC1-7):G06F9/46 主分类号 G06F9/48
代理机构 代理人
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