发明名称 SEMICONDUCTOR ELEMENT AND MOUNTING STRUCTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To lower the source inductance by bonding a MESFET by flip chip method to improve the heat radiation and facilitate the mounting process. SOLUTION: Source electrode pads 3, gate electrode relay pads 4 and drain electrode relay pads 5 are formed on an active element face of a substrate, the relay pads 4, 5 are connected to gate electrode pads 7 and drain electrode pads 8 on the substrate back surface through vias, FET chip 1 is mounted on a package heat sink 16 by the face down method, gate electrode pads 7 are connected to input electrodes 11 on an input circuit board 13 through bonding wires 15 and drain electrode pads 8 are connected to output electrodes 12 on an output circuit board 14 through bonding wires 15.
申请公布号 JPH1126633(A) 申请公布日期 1999.01.29
申请号 JP19970177932 申请日期 1997.07.03
申请人 NEC CORP 发明人 ASANO KAZUNORI
分类号 H01L23/12;H01L21/338;H01L29/812;(IPC1-7):H01L23/12 主分类号 H01L23/12
代理机构 代理人
主权项
地址
您可能感兴趣的专利