发明名称 METHOD FOR FORMING MULTI-LAYER WIRING OF SEMICONDUCTOR DEVICE TO SIMPLIFY FABRICATION PROCESS BY SIMULTANEOUSLY FORMING PLUG AND WIRING
摘要 PURPOSE: A method for forming a multi-layer wiring of a semiconductor device is provided to simplify a fabrication process by using copper to form simultaneously a plug and a wiring. CONSTITUTION: An insulating layer(20) is deposited on a semiconductor substrate(10). A first adhesion layer(40) is deposited into a contact hole. The contact hole is buried by copper. A copper wiring layer(50) is deposited on the first adhesion layer. A photoresist layer is laminated on the copper wiring layer corresponding to a position of the contact hole. A cross-shaped projected plug is formed on the copper wiring layer. The photoresist layer is removed therefrom. A second adhesion layer(70) is deposited on the copper wiring layer. The copper wiring layer is patterned. A nitride layer(90) is deposited on the entire surface of the second adhesion layer. An insulating layer(100) is formed on thereon. The insulating layer is planarized by using a CMP method.
申请公布号 KR100444770(B1) 申请公布日期 2004.08.07
申请号 KR19970077342 申请日期 1997.12.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KO, HO SUN;LIM, JAE YEONG
分类号 H01L21/768;(IPC1-7):H01L21/768 主分类号 H01L21/768
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