Grid arrays with enhanced fatigue life

摘要

Reliability is improved for the mechanical electrical connection formed between a grid array device, such as a pin grid array device (PGA) or a column grid array device (CGA), and a substrate such as a printed circuit board (PCB). Between adjacent PCB pads, a spacing pattern increases toward the periphery of the CGA, creating a misalignment between pads and columns. As part of the assembly method, columns align with the pads, resulting in column tilt that increases from the center to the periphery of the CGA. An advantage of this tilt is that it reduces the amount of contractions and expansions of columns during thermal cycling, thereby increasing the projected life of CGA. Another advantage of the method is that it reduces shear stress, further increasing the projected life of the CGA.

主权项

1. An electronic assembly comprising:
a printed circuit board having an array of connecting pads and a board coefficient of thermal expansion; and an electronic component having an array of connecting lands, the electronic component having a different coefficient of thermal expansion than the board coefficient of thermal expansion, an array of conducting posts connecting the electronic component from the array of connecting lands to respective pads of the array of connecting pads on the printed circuit board through solder, angled conducting posts of the array of conducting posts having an angular tilt outwardly away from a center of the electronic component to the circuit board at 20 degrees Celsius and over a temperature range of 0 degrees Celsius to 100 degrees Celsius, a first plurality of connecting pads of the array of connecting pads outside of a centered region of the printed circuit board being connected from a first plurality of connecting lands of the array of connecting lands of the electronic component by a first plurality of conducting posts of the array of conducting posts outside of a centered region of the electronic component, the first plurality of connecting pads having a same lesser pad thickness than a second plurality of the connecting pads of the array of connecting pads in the centered region of the printed circuit board being connected from a second plurality of connecting lands of the array of connecting lands of the electronic component by a second plurality of conducting posts of the array of conducting posts inside of the centered region of the electronic component having a same higher pad thickness, each of the conducting posts of the second plurality of the conducting posts connected through solder to the second plurality of connecting pads being vertical, and each of the conducting posts of the first plurality of the conducting posts connected through solder to the first plurality of connecting pads having an angular tilt, pads of the first plurality of connecting pads being spaced outwardly with respect to lands of the first plurality of connecting lands joined by respective conducting posts, adjacent pads of the second plurality of connecting pads having a same pad pitch spacing between each other that matches a land pitch spacing between corresponding adjacent lands of the second plurality of connecting lands, and pad pitch spacing of the second plurality of connecting pads being less than pad pitch spacing of the first plurality of connecting pads.