发明名称 MULTI-CORE PROCESSOR FOR EXECUTION OF STRANDS OF INSTRUCTIONS GROUPED ACCORDING TO CRITICALITY
摘要 In an embodiment, a processor includes a plurality of cores. Each core may include strand logic to, for each strand of a plurality of strands, fetch an instruction group uniquely associated with the strand, wherein the instruction group is one of a plurality of instruction groups, wherein the plurality of instruction groups is obtained by dividing instructions of an application program according to instruction criticality. The strand logic may also be to retire the instruction group in an original order of the application program. Other embodiments are described and claimed.
申请公布号 WO2016193774(A1) 申请公布日期 2016.12.08
申请号 WO2015IB01148 申请日期 2015.06.01
申请人 INTEL CORPORATION 发明人 TITOV, Alexandr;MASLENNIKOV, Dmitry;SHISHLOV, Sergey;SCHERBININ, Sergey;BUROV, Valentin;GABOR, Ron;MOTIN, Denis;SHIMKO, Oleg;GARIFULLIN, Kamil;BUTUZOV, Alexander;PODKORYTOV, Evgeniy;CHUDNOVETS, Andrey
分类号 G06F9/45;G06F9/38 主分类号 G06F9/45
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