| 摘要 |
PURPOSE:To improve the manufacturing yield by a method wherein gate regions are formed, and the voltage between the gate and drain corresponding to the pinch-off voltage before forming source regions is decided as the data of controlling the forming condition for the gate regions by the manufacturing lot thereafter. CONSTITUTION:An n<-> drain region 2 is formed on the main surface of an n<+> type drain region 1, and the p<+> type gate regions 3 are selectively formed on the surface part thereof. Thereafter, when a reverse directional bias voltage is impressed between the p<+> type gate regions 3 and between the drain regions 1 and 2, a capacitor is formed between the regions 3 and the region 2 by a depletion layer expanding from the regions 3 to the region 2. While increasing the voltage between the gate and drain, the capacitor between the gate and drain corresponding thereto is measured. By using the curve for this relation, the forming condition for the p<+> gate regions 3 by the manufacturing lot thereafter is controlled. |
