发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE:To bring quickly an output terminal to a high impedance state when a power supply voltage at waiting is decreased into a low level, by providing an MOSFET for bypassing between a gate of an output MOSFET and the power supply voltage. CONSTITUTION:Inverters D1, D2 are connected to each gate of output N-channel MOSFETs Q1, Q2 constituting the output buffer circuit, N-channel depletion MOS transistors Q3, Q4 are provided between the gate and the power supply voltage Vcc, the gate of the Q3, Q4 is connected respectively to the gate of the Q1, Q2 and the gate voltage of the Q1, Q2 is brought into a high state. When the voltage Vcc is selected to a low level at the holding state, the charge of the gate of the Q1, Q2 is discharged to the Vcc via the Q3, Q4 and the Q1, Q2 are brought to be turned off quickly. Thus, an output terminal VOUT has the tri-state; the state Vcc, low state of grounding and high impedance state.
申请公布号 JPS5939123(A) 申请公布日期 1984.03.03
申请号 JP19820149135 申请日期 1982.08.30
申请人 RICOH KK 发明人 TAKADA AKIRA;TAKAHASHI TOYOFUMI
分类号 H03K19/0175;H03K19/094 主分类号 H03K19/0175
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