| 摘要 |
<p>In a data storage unit, internal timing signals are produced by scanning a writable control memory. Thus, the timing of the storage unit can easily be varied, simply by re-writing the contents of the control memory. This allows the use of a faster clock rate without the necessity for complete redesign of the storage unit. The basic clock period is sub-divided into a number of sub-periods, allowing the timing signals to be adjusted with an accuracy better than one clock period.</p> |
