| 摘要 |
<p>The microprocessor interface device is for use in a telecommunications system including a microprocessor. The device includes a first interfacing means which receives signals from, and despatches signals to, the telecommunications system. A second interfacing means receives signals from, and despatches signals to, the microprocessor. A memory is provided, together with arbitration means arranged to control the first and second interfacing means so that only one interfacing means at a time has access to the memory. Decoding means is adapted to respond to address signals presented to the second interfacing means by the microprocessor, to generate signals enabling areas of the telecommunications system to be accessed.</p> |
