发明名称 A SYSTEM OF MICROPROCESSORS CONNECTED TO A SERIES DATA BUS
摘要 <p>In a process for interconnecting microprocessors, a master microprocessor (1) transmits a character. All the slave microprocessors receive it in a register (4). If processing is in progress in the slave (2) for which it is intended, the character is masked until the processing is finished. After the processing, the slave microprocessor (2) recognizes it, removes it from the register (4) and loads this latter with an echo intended for the master microprocessor (1), allowing it to transmit a new character.</p>
申请公布号 IN164434(B) 申请公布日期 1989.03.18
申请号 IN1985DE56519 申请日期 1985.07.17
申请人 SOCIETE D'APPLICATIONS GENERALES D'ELECTRICITE ET DE MECANIQUE S A G E M 发明人 LAMIAUX SYLVES
分类号 G06F15/16;G06F13/24;G06F13/38;G06F15/17;G06F15/177;(IPC1-7):G06F15/00 主分类号 G06F15/16
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