发明名称 Sine signal generating circuit using pulse width and/or frequency adjustable, rectangular input signal - changes input signal scanning ratio after each preset number of periods to form first intermediate signal
摘要 The rectangular input signal (S1(t)) has its scanning ratio complementarily changed after a preset number of periods to form a first intermediate signal (S2(t)). The latter is passed through a low pass filter to obtain a sine signal (U). The circuit passes the input signal through a frequency divider (25). The divided signal changes its scanning ratio after each half-period, and a logic circuit (28) forms the complementary changed intermediate signal from the input signal. The low pass filter (31-33) contains a first stage (31, 32) for prefiltering the intermediate signal, obtaining a rectangular, second intermediate signal (S3(t)), and a second stage (33) for obtaining the sine signal from the second intermediate one. USE/ADVANTAGE - Maintaining sinusoidal waveform of power supply by simple digital control low-cost facility for signal frequency and amplitude adjustment as necessary.
申请公布号 DE4224771(A1) 申请公布日期 1994.02.03
申请号 DE19924224771 申请日期 1992.07.27
申请人 PHILIPS PATENTVERWALTUNG GMBH, 20097 HAMBURG, DE 发明人 BROECK, HEINZ VAN DER, DR., 5352 ZUELPICH, DE
分类号 H02M7/48;H03B28/00;(IPC1-7):H03B28/00;H03B19/00 主分类号 H02M7/48
代理机构 代理人
主权项
地址