| 摘要 |
PURPOSE: To perform the detection and correction of errors when pulling out stored code words by providing an error detection and correction encoder/ decoder circuit (ECC) between the input/output terminal and an internal memory array. CONSTITUTION: A data word supplied together with an address signal or a control signal is inputted through a data combiner 50 to an ECC 70 and stored in an internal memory array 30 as the code word encoded for error correction. Corresponding to the control signal, that code word is pulled out of the array 30 to the ECC 70 and during decoding, the error is detected and corrected as needed. In this case, it is displayed by a signal at a signal bit error output terminal SBE and when the correction is disabled, it is displayed by a signal at a recovery disable error output terminal UE. These signals are supplied to a data selector 60 and further diagnosed by a system processor as desired (a multiplex signal line is expressed by a crossing slanting line in the figure and a numeral at the side shows the number of bits). |
