发明名称 Serial digital data link with error detection
摘要 The serial digital data link monitor circuitry operates on a single wire multiplex connection linking intercommunicating signal processing devices. The level of transmitted and/or received data (D) is compared with predetermined reference levels (GR1-GR4) to test whether the signal lies within or outside of the signal limits for data values 0 and 1. The limit values of th signal are less than or equal to one half of the signal excursion between 0 and 1.
申请公布号 FR2721726(A1) 申请公布日期 1995.12.29
申请号 FR19950007155 申请日期 1995.06.15
申请人 VOLKSWAGEN AG 发明人 STRAUSS KLAUS-DIETER
分类号 B60R16/02;B60R16/03;G06F11/00;H02J7/00;H04L12/26;H04L12/413;(IPC1-7):G06F13/38 主分类号 B60R16/02
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