Scan driver including stage circuit for reducing leakage current

摘要

A stage circuit includes a first driver, a second driver, a first output unit, a second output unit and a controller. The first driver controls voltages of first and second nodes, according to a first power source, a third power source, a start signal or a carry signal of a previous stage input to a first input terminal, and a clock signal supplied to a second input terminal. The second driver controls voltages of third and fourth nodes, according to voltages of the first power source, the third power source, the first input terminal and the first and second nodes. The first output unit outputs a carry signal to a first output terminal, according to voltages of the first power source, the second input terminal and the third and fourth nodes. The second output unit outputs a scan signal to a second output terminal, according to voltages of the second power source, the second input terminal and the third and fourth nodes. The controller is electrically coupled to the first output terminal and the second driver.

主权项

1. A scan driver comprising:
stage circuits respectively coupled to scan lines to supply scan signals to the scan lines, the stage circuits being driven by one clock signal, wherein each of the stage circuits comprises:
a first input terminal configured to receive a start signal or a carry signal of a previous stage,a second input terminal configured to receive the clock signal,a first output terminal configured to output the carry signal,a second output terminal configured to output one of the scan signalsa first driver coupled to a first power source, a second power source, the first input terminal and the second input terminal to control voltages of first and second nodes;a second driver configured to control voltages of third and fourth nodes, according to voltages of the first power source, the second power source, the first input terminal and the first and second nodes; anda first output unit configured to output the carry signal to the first output terminal, according to voltages of the first power source, the second input terminal and the third and fourth nodes.