| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device having an ESD protection circuit where an element can be made fine and voltage can be lowered. SOLUTION: An ESD protection circuit 2 is provided with n-type wells 12 and 14 formed on a p-type substrate 11, a p-type well 13 formed in the n-type wells, and MISFET-MT1 and MT2 of n-channels which are formed in the p-type well 13 and are disposed between Vdd terminals 3 and 4 and an I/O terminal 4. A parasitic pnp transistor is arranged where p-type emitters 27 and 28 are formed in the n-type well 12 at a position near the ends of the p-type well 13, the n-type well 12 is set to be a base, and the p-type well 13 to be the collector and the base is connected to the Vdd terminal 3. A potential control circuit 6 where the p-type well 13 floats at the time except regular operation is disposed.
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