Integrated circuit package

摘要

Embodiments of the present disclosure are directed towards a method of assembling an integrated circuit package. In embodiments the method may include providing a wafer having an unpatterned passivation layer to prevent corrosion of metal conductors embedded in the wafer. The method may further include laminating a dielectric material on the passivation layer to form a dielectric layer and selectively removing dielectric material to form voids in the dielectric layer. These voids may reveal portions of the passivation layer disposed over the metal conductors. The method may then involve removing the portions of the passivation layer to reveal the metal conductors. Other embodiments may be described and/or claimed.

主权项

1. An integrated circuit (IC) package comprising:
a wafer having a plurality of metal pads embedded on a side of the wafer; a passivation layer directly coupled to the side of the wafer and in direct contact with the metal pads and further including a plurality of voids completely through the passivation layer, each of the plurality of voids having a void edge disposed over one of the metal pads; a dielectric layer directly coupled to the passivation layer and having a plurality of vias completely through the dielectric layer and disposed over the metal pads, wherein each of the plurality of vias has a via edge disposed over one of the metal pads, wherein the void edges of the passivation layer are aligned with the via edges of the dielectric layer.