| 摘要 |
Data storage apparatus consisting of an array of RAM chips 20, with Hamming code checking for detecting double-bit errors. Address signals such as Ao are fanned-out to the chips by way of driver circuits 31. Each driver circuit distributes an address bit to only two columns of chips (or in some case, just one column), so that if one of the driver circuits fails, no more than two chips in each row will be affected. Hence, no more than two bits in any data word will be in error, and this can be detected by the Hamming code. <IMAGE> |
