| 摘要 |
A modulator transmitting an analog data signal by variation of the frequency of an oscillator comprising an integrator (1, 2) and a bistable circuit with trigger hysteresis (8 to 13). The two-level voltage from the bistable circuit, taken to a terminal of a resistor network (6, 7, 30) connected to the input of the integrator, is formed from the potential O and the potential kU, which is lower than the supply voltage U, applied respectively to the inputs of two analog switches (12, 13) whose outputs are connected to the output of the bistable circuit. The data signal ve is applied to the input of a conversion circuit (17) arranged to supply voltages ve1 and ve2 varying linearly as a function of ve and symmetrically with respect to kU/2 and applied respectively to the inputs of two further analog switches (26, 27) whose outputs are connected to another terminal in the resistor network. The input and output signals of the inverter (9) of the bistable circuit are used to control the switches. |
