发明名称 |
Frequency synthesizer. |
摘要 |
<p>A saw-tooth waveform signal generating circuit 3 generates a saw-tooth waveform signal d in response to a timing signal b derived from a reference clock a. A voltage comparator 4 slices the saw-tooth waveform signal with a reference voltage to shape the waveform thereof, thereby producing a synthesizer output e having a rectangular waveform. A counter 5 adds or subtracts a predetermined value every time a reference clock arrives. The count of the counter 5 is converted to an analog value by a DAC 6 and then is applied to, for example, the saw-tooth waveform signal generating circuit as a bias. As a result, the voltage for causing the saw-tooth waveform signal to start rising or falling is manipulated to allow the voltage comparator to slice the saw-tooth waveform signal at any desired timing. Hence, a synthesizer output can be produced in any desired phase. <IMAGE></p> |
申请公布号 |
EP0614158(A2) |
申请公布日期 |
1994.09.07 |
申请号 |
EP19940301077 |
申请日期 |
1994.02.15 |
申请人 |
NEC CORPORATION |
发明人 |
URIYA, SUSUMU, C/O NEC CORPORATION;MIYASHITA, HIDEO, C/O NEC MOBILE COMM., LTD. |
分类号 |
H03B28/00;G06F1/02;G06F7/72;G06J1/00;(IPC1-7):G06J1/00 |
主分类号 |
H03B28/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|