Inverting output driver circuit for reducing electron injection into the substrate

摘要

A new inverting output driver circuit is disclosed that reduces electron injection into the substrate by the drain of the circuit's pull-up field effect transistor. This is accomplished by adding additional circuitry that allows the gate voltage of the pull-up transistor to track the source voltage. The output circuit makes use of an inverter having an output node (hereinafter the intermediate node) coupled to VCC through a first P-channel FET, and to ground through first and second series coupled N-channel FETs, respectively. The gates of the P-channel FET and the first N-channel FET are coupled to and controlled by an input node. The inverter output node controls the gate of third N-channel FET, through which a final output node is coupled to VCC. The intermediate node is coupled to the final output node through a fourth N-channel FET, the gate of which is held at ground potential. The gate of the second N-channel FET is coupled to VCC through a second P-channel FET and to the final output node through a fifth N-channel FET which has much greater drive than the second P-channel FET; the gates of both the second P-channel FET and the fifth N-channel FET also being held at ground potential. Certain obvious variations of the circuit are possible. For example, the function of the first and second N-channel FETs may be reversed. In addition, the second P-channel FET functions as a resistor, and may be replaced with any device which functions as a resistor.