发明名称 DATA TRANSMISSION SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a data transmission system combining a FIFO(first-in and first-out) and a transmission circuit and reducing interruption loads on the processor of a system (for performing HDLC(high level data link control) framing or the like, for instance). SOLUTION: The boundary information of a frame is stored in the FIFO 43 and the transmission circuit 46 reads the frame boundary information and performs a frame end and a frame start processing. Thus, the state of heavy loads where the processor 40 is required to perform interruption processing in limited time for a frame processing is avoided.
申请公布号 JP2000200175(A) 申请公布日期 2000.07.18
申请号 JP19980312860 申请日期 1998.11.04
申请人 SHARP CORP 发明人 IENAKA HITOSHI
分类号 G06F13/38;G06F5/06;G06F5/12;G06F13/00;H04L13/08;(IPC1-7):G06F5/06 主分类号 G06F13/38
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